Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

Efficient MVL Circuit Design with Use of p-CNTFETs and n-CNTFETs

Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs

Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits - ScienceDirect

Design and analysis of carbon nanotube FET based quaternary full adders

a) Transistor Structure Based on CNTFET (b) SB-CNTFET (c) MOSFET-like

Low energy and area efficient quaternary multiplier with carbon nanotube field effect transistors - Rahmati - 2021 - ETRI Journal - Wiley Online Library

PDF) A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

PDF) Performance Analysis of CNTFET Based Digital Logic Circuits

Full article: Novel design of power-efficient quaternary logic gates using CNTFET

GNRFET- and CNTFET-Based Designs of Highly Efficient 22 T Unbalanced Single-Trit Ternary Multiplier Cell

Fault Tolerance in Carbon Nanotube Transistors Based Multi Valued Logic

PDF] High-Performance and Energy-Efficient CNFET-Based Designs for Ternary Logic Circuits

Design and evaluation of energy-efficient carbon nanotube FET-based quaternary minimum and maximum circuits

Figure 3 from Design and Evaluation of Multiple Valued Logic Gates Using Pseudo N-Type Carbon Nanotube FETs

OAK 국가리포지터리 - OA 학술지 - Transactions on Electrical and Electronic Materials - Integrated Circuit Design Based on Carbon Nanotube Field Effect Transistor

Band diagram of a double-gate ambipolar CNTFET: the fields A and B are